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Test Equipment Design Engineer

  • Salary: Negotiable
  • Job type: Contract
  • Location: Cheltenham, Gloucestershire
  • Sector: Engineering
  • Date posted: 29/03/2018
  • Job reference: J384165A

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Test Equipment Design Engineer

12 Months


£55.00 p/h

Role Summary:

An engineer required to work on the design and development of new test equipment and requirements for testing new product ranges. The same engineers will also be required to support the transition of built test equipment into production areas.

Key Activities:

  • Working with the Project Managers to review schedules.
  • Working in the laboratory on Test Equipment Functional Circuit research and development projects.
  • Working with Electronic circuits (Verification and Validation of Designs)
  • Creating Engineering Documentation.
  • Facilitating Document, Data, and Equipment reviews.
  • Working with Suppliers to ensure that technical requirements are met.
  • Conducting Equipment Testing and analysing Test data results.
  • Delivering analytical reports to project Stakeholders.
  • Commissioning and integrating Test Equipment.
  • Supporting the hand-over of Test Equipment to production and sustainment teams.

Essential responsibilities:

  • Performing tasks in line with the project plans.
  • Designing Test Equipment and Functional circuits.
  • Verifying design data and validating circuit performance.
  • Delivering working technical solutions to the project stakeholders.
  • Delivering analytical data and reports to the project stakeholders.
  • Liaising with suppliers and stakeholders on a regular basis.
  • Facilitating document and data reviews at the Cheltenham Campus and at local suppliers.
  • Reviewing technical data in line with the project requirements.
  • Conduction technical work in laboratory areas.

Requirements and Characteristics:

  • City of Guilds/ONC/HNC/OND/HND or similar level qualification
  • Previous experience of Test Equipment
  • Self-Motivator, can work alone or as part of a team
  • Electronics design experience - JTAG/BDM/Boundary Scan Knowledge
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